1. Field
This disclosure relates to non-volatile memory.
2. Description of the Related Art
Semiconductor memory has become increasingly popular for use in various electronic devices. For example, non-volatile semiconductor memory is used in cellular telephones, digital cameras, personal digital assistants, mobile computing devices, non-mobile computing devices and other devices. Electrically Erasable Programmable Read Only Memory (EEPROM) and flash memory are among the most popular non-volatile semiconductor memories. With flash memory, also a type of EEPROM, the contents of the whole memory array, or of a portion of the memory, can be erased in one step, in contrast to the traditional, full-featured EEPROM.
Both traditional EEPROM and flash memory utilize a floating gate that is positioned above and insulated from a channel region in a semiconductor substrate. Typically, a “tunnel oxide” insulates the floating gate from the channel. The floating gate is positioned between the source and drain regions. A control gate is provided over and insulated from the floating gate. The threshold voltage (VTH) of the transistor thus formed is controlled by the amount of charge that is retained on the floating gate. That is, the minimum amount of voltage that must be applied to the control gate before the transistor is turned on to permit conduction between its source and drain is controlled by the level of charge on the floating gate.
Some EEPROM and flash memory devices have a floating gate that is used to store two ranges of charges and, therefore, the memory element can be programmed/erased between two states, e.g., an erased state and a programmed state. Such a flash memory device is sometimes referred to as a binary flash memory device because each memory element can store one bit of data.
A multi-state (also called multi-level) flash memory device is implemented by identifying multiple distinct allowed/valid programmed threshold voltage ranges. Each distinct threshold voltage range corresponds to a predetermined value for the set of data bits encoded in the memory device. For example, each memory element can store two bits of data when the element can be placed in one of four discrete charge bands corresponding to four distinct threshold voltage ranges.
One issue of concern is data retention. Over time, charge on the floating gate may be lost or gained across the tunnel oxide, thereby changing the threshold voltage. It is also possible to lose or gain charge across the insulator the separates the floating gate from the control gate. For some devices, losing or gaining charge across the tunnel oxide is a greater problem of these two effects.
Another phenomenon that presents problems is stress induced leakage currents (SILC). Programming and erasing memory cells may stress the insulator below the floating gates. This stress may result in a greater leakage current through the insulator.
Another problem is program saturation. When a high program voltage is applied to the control gate, the tunneling of electrons should occur through the tunnel oxide between the substrate and the floating gate. However, tunneling should not occur through the inter-gate oxide between the control gate and the floating gate. If, however, electrons do tunnel through the inter-gate oxide then programming saturates.
For some memory arrays, with continued scaling the individual threshold voltage ranges that define each state are getting wider. If the individual threshold voltage ranges are wider, then the margin between the threshold voltage ranges becomes smaller (assuming the same overall width for all threshold voltage ranges). The smaller margin between threshold voltage distributions makes data retention a more significant issue.